Memory devices are prone to fault injection attacks such as by use of lasers or X-rays. For example, lasers and X-rays allow for precise attacks by modifying states of bits in the memory device. The laser is especially suitable for injecting faults in registers, RAM (random access memory) devices, EEP (electrically erasable and programmable) memory devices, and flash memory devices. Such fault injection may be permanent or temporary.
In addition, such fault injection attacks may be used to reveal secret keys or output memory content. Detection of such fault injection into the memory device is desired for preventing misuse of information stored in the memory device.
In the prior art, a laser detector may be used to detect for a laser source. However, the laser detector is not adapted to detect for laser attacks on memory devices.
Alternatively in the prior art, memory devices are adapted to include storage of error detection code. In that case, the memory device detects for fault injection attacks within the memory device. However, implementation of such error detection code within the memory devices increases the silicon area of the memory device. In addition, if the states of the bits are modified on a bus outside of the memory device, the error detection code may not detect such fault injection outside of the memory device.
Also in the prior art, the memory device may include hardware redundancy with redundant data storage for detection of fault injection within the memory device. However, such storage redundancy results in duplication of silicon area resulting in especially large silicon area for memory devices with high capacity. In addition, data verification with storage redundancy may result in slower operation of the memory device.
Alternatively in the prior art, a data processing unit such a CPU (central processing unit) accessing the memory device includes software for verifying data integrity. However, such software which is also stored in a memory device is subject to fault injection. In addition, code size and execution time for the software of the CPU is increased with such additional data verification functionality.
Thus, an efficient mechanism for detection of fault injection within the memory device and outside of the memory device such as in the bus to/from the memory device is desired.